TLDR Hardware 2026-08-21
Apple's AirPods camera leak 👀, Marvell deepens Google ties 🤝, Waymo shows robotaxi brains 🧠
Apple's macOS Update Reportedly Contains Video of AirPods With a Camera (3 minute read)
A newly discovered video asset embedded within Apple's latest macOS update appears to depict future AirPods equipped with built-in camera sensors. The animation suggests Apple is actively developing wearable audio devices capable of capturing environmental visual data to enhance spatial computing, gesture controls, and contextual visual intelligence. While unannounced by Apple, the leak offers evidence of ongoing hardware prototyping aimed at expanding computer vision and multimodal AI capabilities across its personal AI portfolio.
Marvell Gives Google Right to Buy Up to $12.2 Billion in Shares (3 minute read)
Marvell Technology has granted Google the right to acquire up to $12.2 billion worth of its shares, strengthening the strategic and commercial ties between the custom chip designer and the cloud hyperscaler. The equity warrant structure aligns long-term hardware co-development and silicon sourcing commitments across custom application-specific integrated circuits (ASICs), optical interconnects, and datacenter networking silicon.
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Engineering and Applications
How Will the Custom HBM Business Work? (4 minute read)
This post examines the shifting commercial models and technical complexities surrounding custom High Bandwidth Memory (HBM) as the semiconductor industry transitions toward HBM4 architectures. Moving the memory stack's base logic die to leading-edge foundry processes requires unprecedented collaboration among DRAM manufacturers, pure-play foundries, IP providers, and custom ASIC designers. This structural shift introduces major operational challenges regarding Known Good Die (KGD) test coverage, advanced packaging integration, and yield-loss liability, requiring new multi-party business frameworks to commercialize application-specific memory subsystems.
Waymo Lifts the Lid on the 'Brain' Powering Its Robotaxis (3 minute read)
Waymo has disclosed the compute architecture powering its autonomous taxi fleet, unveiling a custom in-house 5nm ASIC alongside key hardware suppliers including Nvidia, AMD, TSMC, Socionext, Micron, Samsung, and SanDisk. Built to handle front-end sensor ingestion, the custom chip delivers over 1,000 TOPS of ML compute to denoise and fuse raw lidar, radar, and camera streams before passing data to core driving models. Housed in the vehicle's trunk and tied into the liquid cooling system, the platform relies on a dual-engine redundant design for fail-operational safety while pairing proprietary silicon with merchant GPUs and CPUs.
The growing platform behind physical AI (Sponsor)
GPUs weren't made for low-power, real-time, multimodal physical AI. See how SiMa.ai's purpose-built platform for physical AI delivers best performance per watt, streamlined app development, low latency, and on-device reliability, no cloud required.
Read how SiMa.ai is dismantling the GPU moat.Fractile's In-Memory Inference Chip Aims for 25x LLM Speedup, Now Talking $6.5B (3 minute read)
London-based Fractile is building specialized inference processors around an in-memory computing architecture, placing compute directly alongside on-chip memory instead of routing data back and forth to conventional DRAM, the round-trip that normally throttles inference latency on standard GPUs. By eliminating that data-transfer bottleneck, the chip is designed to run large language model inference up to 25 times faster and at a fraction of the operating cost of conventional silicon. The architecture has now attracted a partnership with frontier lab Anthropic, and the company is in talks to raise new funding at a $6.5 billion valuation on the back of it.
CFETs Forge Better Connections (4 minute read)
This article details how chipmakers, including Intel, Samsung, TSMC, and IBM, are preparing to adopt Complementary FETs (CFETs) to nearly double transistor density by vertically stacking p- and n-type nanosheets. Expected to deliver up to a 40% reduction in cell height alongside notable performance and efficiency gains, the primary integration challenge shifts toward fabricating complex vertical interconnects and direct backside power delivery vias. As manufacturers evaluate divergent sequential and monolithic stacking architectures, atomic-level process control and multi-physics simulation are becoming essential to manage interconnect parasitics and optimize yield learning.
Burst of New Solar Power Makes Midwest Grid the Biggest in US (3 minute read)
A massive influx of newly connected utility-scale solar installations has elevated the Midwest power grid into the largest regional transmission network in the United States. Driven by accelerated clean energy targets, corporate power purchase agreements, and surging electricity consumption from industrial and datacenter buildouts, the region's solar generation capacity has rapidly expanded to overtake traditional coastal grids.
Why Musk's SpaceX Telecom Plan Won't Work (3 minute read)
This post examines the architectural and economic hurdles facing Elon Musk's SpaceX telecom ambitions, arguing that satellite direct-to-cell services cannot replace dense terrestrial infrastructure. While Starlink's direct-to-device technology provides valuable coverage for remote dead zones and emergency messaging, severe spectrum constraints and orbital propagation physics prevent it from delivering the capacity, throughput, and indoor penetration achieved by terrestrial small cells.
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